Through vertical interconnect access (via) is a vertical electrical connection passing completely through a silicon wafer or die. Through-silicon via (TSV) demonstrates a high performance technique used to create smaller packages and integrated circuits by allowing 2.5-dimensional (2.5D) interposer or 3-dimensional (3D) package wafer integration schemes. TSV integration improves physical scaling limitations while delivering greater performance and functionality. However, the current implementation of TSV designs still face manufacturing challenges.
From the foregoing discussion, it is desirable to provide a TSV integration scheme that is more robust, simplified and reliable.